Re: programmable logic

On Fri, 3 Oct 1997 17:15:31 -0800, you wrote:

>
>>I was just getting ready to spam vectorlist in search of interesting logic
>>arrays. I have a very nice vector generator design that's fully digital
>>that uses 3 10 bit latches, an adder, a 10 bit 2 channel mux, and 2 ten bit
>>counters connected to the DACs. It very simple, but unfortunately I can't
>>find any commonly available micros the run fast enough to do this in
>>software. You need to update the DAC counters on a digital vector
>>generator at a 3.33mhz (avg) to generate the vectors.
>
>Ahhh. We're looking at the same thing. You ran into the same "gotcha"
>that I did-- need speed for digital vector generator. Plus it seems silly
>(not to mention tedious to prototype) a small army of TTL logic... :-/
>
>>A 20mhz PIC internally divides the clock by four, so it runs at a 5mhz
>>speed. Too slow.
>
>Right, this is why I went to an Analog Vector Generator like Atari did.
>Another way (that Atari also did, but never made it out the door) is to
>use a DSP with a couple serial DACs. The Analog Devices 2105 is cheap and
>friendly to program...

The problem I have with going with the AVG design are the integrators
themselves. They can only zero'd, and not preset to any random value.
This makes it hard to emulate the Sega, Cinematronics and old Atari DVG
systems. If I were to go with an analog design, I'd be tempted to use the
Cinematronics design. It gets around a lot of the problems of the
integrator.

I like the digital design for a couple of reasons:

1) You never have to worry about lines meeting up. All the analog designs
use critically time vector lengths to line up correctly, and they never
really line up exactly.

2) This might be over kill, but by using somewhere between 2 and 4 meg of
ROM (or possibly RAM) as table lookups between the counters and the DACs,
you can do all the pincussioning and linearity control digitally. So it's
a lot of ROM, but ROMs are not *that* expensive, and it's not like I'm
going into high quantity production. And once again it allows you to set
the *excact* pincussioning and linearity needed by the monitor, no
drifting, ever.

My design differs a bit from the Atari DVG and the Sega (though I haven't
fully deciphered the Sega) in that I've designed the Bresenham's algorithm
into some really simple hardware. The catch is that register values must be
pre-calculated by the PC, an option Atari and Sega didn't have. (Since
they were both background VGs and didn't have there own processor, to speak
of.) I control the line draw speed on a clock by clock basis to assure all
angles are drawn at the same speed. The TTL design looks very workable but
uses something like 20 ICs! (Why are all TTL devices only 4 bits!)

Most video cards with built in line draw use the bresenham algorithm, since
there is no rounding error regardless of the line line, unlike the clocking
method used by Atari (though it's pretty miniscule).

>>The new SX 50mhz part that runs at 50mhz (no internal
>>divide by 4) could do it (well the counters would still have to be external
>>because of the number of I/O lines available, *and* it's still not fast
>>enough to handle the counters), but are they available yet? And can it be
>>programmed using a standard PIC programmer?
>
>Supposedly they're sampling now (October) and full production in Q4.
>Programming doesn't look to be by a "standard" PIC programmer (like a
>PICMaster or something). Parallax however is offering a programmer/ICE for
>$249. That's pretty cool assuming it's a full speed ICE for that price.
>
>You *can* get away with overclocking PICs quite a lot. I've heard that
>32MHz on the 20MHz parts is pretty solid, but that 40MHz is a little
>twitchy.

Even if you overclock the PICs they still divide by four. To run a PIC at
the speed of the SX part (when programmed to the no divide mode) you would
have to run them at 200mhz!

>>WSI makes a *very* fast processor that runs at 100mhz - at one clock per
>>instruction, and can do multiple things on each clock, but of coarse no-one
>>sells the processor but WSI (they're only interested in quantity orders),
>>and you have to buy their custom hardware to program it.
>
>Word has it that Western Design Center (the guys that own the IP for the
>6502) have a fully synthesizable 6502 core in VHDL and Verilog. Depending
>on the process it's been run at up to 173MHz... :-)

Wow!

>>How is the GAL6001 programmed? Must you buy a custom programmer from
>>Lattice? (I've never had need to play with PALs, GALs, just an FPLA many
>>years ago, and then just as an address decoder)
>
>I'm trying to figure that out. :-/ Lattice is big on their ISP (in circuit
>programmable) stuff, which is just a cable going from a few pins on a PC
>parallel port to a header on your board. You can program all their GALs,
>Generic Digital Switches, and FPGA's from the same 5-wire bus. Pretty
>slick. I'm not so sure about the 6001 and 6002 though. Might take a
>stand-alone programmer. :-/ I suppose you could always just use a 2032 or
>something with the ISP cable, but I've never seen them available in singles
>for cheap. (like JDR)

I went to there home page and have been looking at the isp parts. I'm
wondering if you could program one of these to do the whole VG and
eliminate any processor (Since my ZIP drive claims a 20mb transfer rate
through the paralled port, I'm assuming I can talk to the VG at the 800k
rate I believe I'm going to need. To bad, I wanted to use the serial
port...)

The parts are expensive, but if it was nearly the whole design it wouldn't
be so bad.

-Zonn
Received on Fri Oct 3 18:35:08 1997