Re: FPGA

> G'day Clay (and folks),
>
> A while back I looked at putting the whole Cinematronics board onto a
> single FPGA. However two obstacles that I ran into were the RAM and the
> I/O pins. In your letter down below, Clay, you said that SRAM chewed up
> alot of the FPGA. Does that hold for dynamic RAM like the 256 words by
> 12 bytes of RAM on the Cinematronics board?
>
> With all the digital video output, control panel input and sound card
> interface, I also felt that I'd run out of I/O pins even with the
> largest package (4020, at the time).
>
> Right now, I'm looking at duplicating the Cinematronics Exercisor with a
> FPGA and making a universal translator for all Cinematronics control
> panels. These tasks seem better suited for FPGA. Much more gate
> intensive rather than register/RAM/IO.
>
> Steven S Ozdemir
> sso@dsc.com

The Cinematronics CPU has 256x12 bits of SRAM with separate Din & Dout.
Zonn probably has the know-how to redesign the ROM interface to work
with only 1 ROM which would reduce the number of pins by 8, so you'd
need ummm 12x2 (vectors) + 6 (sound) + 15+8 (rom bus) + 24(DIP/CTRLS)
= about 77 IOs. If you keep the IO multiplexing off the chip (which
could work with the control panel FPGA), you'd need about 18 less or
aproximately 60 IOs. Hmmmm YUK. If you could find A/Ds with built in
latches, you could multiplex the XY data to get down near 50 IO. The
rest of the board is about 125 74xx parts.

What would be really nice is a VHDL implementation - wasn't someone
working on that?

Just more Paul babble...

-- 
 ___   __   _   _  _
|   \ /  \ | | | || |       phkahler@oakland.edu     Engineer/Programmer
|  _/| || || |_| || |__     " What makes someone care so much?
|_|  |_||_| \___/ |____)      for things another man can just ignore. " -S.H.