Re: FPGA

[SRAM]
>My understading is that is takes four transistors per bit setup as a
>Set/Reset latch.
[DRAM]
>In DRAM they use 1 transistor and a capacitor. Unfortunately the capacitor
>will discharge quickly, so it must be *refreshed*.
>
>So I believe this makes DRAM nearly four times the storage density of SRAM
>for the same die size.

That sounds right. Would seem to be true if you look at density vs.
availability or SRAM and DRAM at any given point in time.

>The PDP-8 clone I used to program back in a Jr College was a completely
>wire wrapped work of art. All TTL and a *lot* of wire wrap.

We had a real one at Oregon State. It was pretty cool-- the one "neat" EE
course in Sophomore year was assembly programming and they made the first 4
weeks all PDP-8. We had a DOS simulator (of the PDP-8, not the other way
around!) to work with at home, and then you had to hand-enter the code on
the PDP for your "real" run. Pretty fun in an admittedly nerdy way. ;-)

>I'd sure like to have that now, it would make a great room heater. I
>wonder if you could write software loops that would cause it to give off
>different amounts of heat and use it as a self regulating heater...

Reminds me of the story of the guy that used processor loading to convey
morse-code and "transmit" secure files to unsecure remote terminals. (I
think it was at AT&T when some government spook-type was gloating how
secure the computer was.) The programmer delivered a copy of an internal
"secure" database to the security guys when they "knew" he couldn't have
got it. Urban legend has it that he was fired on the spot, and rehired by
the defense contractor that made the computer before he made it to his
car... ;-)

-Clay

Clayton N. Cowgill Engineering Manager
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Received on Mon Oct 6 17:12:57 1997