Re: PC Vector-generator card

On Tue, 9 Dec 1997 11:08:33 -0800, Clay Cowgill <clayc@diamondmm.com> wrote:

>Just an FYI (maybe Zonn cares, otherwise I'll just get this into the
>archive in case anyone needs it later on).
>
>I worked on a design for some binary rate multipliers over the weekend. It
>looks like all four of the 7497 BRM's from Asteroids/Deluxe/OmegaRace, etc.
>fit in a single Lattice 2032 CPLD. (I did the design in Scenario.)
>
>I have a feeling that a 2032 probably costs more than the 4 7497's (well,
>maybe not-- Jameco wants $2 a pop for those), but this will re-target to
>lots of other programmable logic too. There's tons of gates left in the
>2032 at this point-- although pincount is getting a little low. If I go to
>the 2064 (same basic guts as the 2032, just an 84 pin package instead of 44
>pins. 70 I/O's vs. 35) I could probably fit all the counters and most of
>the rest of the Vector Generator in there too.
>
>Heh... Looks like these Binary Rate Multipliers will be good out to about
>135MHz. Kinda overkill compared to the 3MHz clock that Atari used, but
>hey, speed is good. :-)

Actually I do care, I'm just under massive pressure until late wednesday to get
out a demo of the project I'm working on.

I have some ideas to bounce off you as far as putting a Bresenham's line draw
engine into hardware. It looks easier to me than the rate multipliers and the
real nice thing is that it can be setup (very easily) to be self clocking --
that is different angle lines will always be drawn at a constant rate. And
being a Bresenham line draw, there is no accumulative error. (Those lines will
always match at the end points)

Give me until the end of the week and I'll come up with a little block
diagram/schematic sort of thing to show you what I mean. It's actually simple,
I just have *zero* time right now.

-Zonn

(Back to work, I just got a call for a progress report -- *crack* goes the
whip!)

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Received on Tue Dec 9 11:30:54 1997