> As for the PC-vector generator card... (Zonn! Input! Need Input!
> Hint-hint don't let that job get in the way of the important stuff! ;-)
> I've got a VHDL compiler all set up and targeting to the Cypress 371i.
> (About $6 in singles.) If the adders get too big we can target to the 372i
> (64 macrocells instead of 32) for about $10 a pop. The Lattice rep is
> bringing me a copy of Synario with VHDL support, so I'll see how that looks
> too...
>
> Trivia... Ripple-adders are kind-of a pig when it comes to programmable
> device resources. Each pass (bit) takes a macrocell, so a 12 bit adder
> eats ~38% of a 32 macrocell PLD! Still though-- a comparitor, an adder, a
> subtractor, and some registers should cover what we need for Bresenham's in
> hardware.
And what if you just used 24 bit adders and did fixed point (x,y) += (dx,yd)?
You would eliminate the subtractor & the comparator. This is the 90's, we
don't use Bresenham any more (see bitmap rotation source on my web page). Of
course part of the vector setup would involve a divide but you could keep
that on the PC.
More importantly I want to know why you're going to do a DVG in the first
place? You probably don't like analog stuff (nor do I) but there really
isn't much to a vector generator. You'd probably want to do it cinematronics
style (which doesn't use integrators) since some form of "absolute"
positioning is needed for the DVG & Cine games. I just don't like the
artifacts you get with the DVG.
Just some thoughts...
-- ___ __ _ _ _ | \ / \ | | | || | phkahler@oakland.edu Engineer/Programmer | _/| || || |_| || |__ " What makes someone care so much? |_| |_||_| \___/ |____) for things another man can just ignore. " -S.H.Received on Tue Dec 16 06:35:38 1997
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