DAC rates

Zonn "said"

"=46or 12 bit resolution were going to need a 12 bit DAC that can be fully=
 updated
at about 6mhz. So assuming no register addressing overhead, that many of=
 the
DACs require, the serial data must be clocked at 72mhz. Any internal =
addressing
needed to operate the DAC will increase this value. Good luck!
"

I'm having a little trouble parsing this..

Guess I should have asked for more detail on WHAT was being
designed :-)

>From the message exchange, I'm assuming 12 bits of resolution in
X and Y. At what rate can these X and Y values change? I was
assuming the rate of change was fairly slow, but thinking about
it, it is going to be the rate at which the beam will move to
the next x,y position on the screen, which can be quite fast..

I'm guessing this is the "6Mhz" in Zonn's message.
Received on Wed Dec 17 15:01:46 1997