>>>AVG #1
>>>No vector output (flat line 0 v on X / Y out) (SK on)
>>>Watchdog barking
>>>With WD disabled still nothing.
I borowed a working set of BZ boards so I know I am working with a known good math box board.
I tested my roms and determined that I had a bad one at position L/M1. Replaceing it removed my watchdog problem in normal operation.
Problem I am now having is that I am going in a circle with the vector generator section of the board.
I don't have proper information getting to the DAC's.
So I went back to the VG Data shifter section.
I am not getting proper DVGx signals into them, I am also not getting proper latchx signels so I went to the latch / strobe address decoder at J7 (chip socketed and replaced with new).
I then determined I was not getting proper state signals into it.
This led me back to the state machine prom.
I then noticed that a couple of pins had been cut on the 74LS367 at H7 (love operators). So I socketed and replaced it. No change.
Next I checked the state machine inputs (op 0-2). They don't appear to be working so I went to the VG data shifter again to see where they came out. This leads me back to the DVG 4-7 signals.
So now I go to the VG Ram / Rom. The roms check out OK. But the AM signals look fishy. This takes me to the VG Address Selector. The AB 0-12 signals from the MPU look ok.
The AVG signals look fishy though. That takes me to the Drivers H7 (the same one as above) / F7 which buffer the DVY signals. The DVY signals in look bad and this takes me full circle back to the VG Data shifter section which sources those signals.
GRRRRRR.
So anyone have a good way to debug this section? Or a place to break the chain so I can start to figure out where what is going wrong?
>>>Test switch results in nothing
Now when I put the board into self test it give a low tone for about 5 seconds then resets. This goes on forever. No usefull information before the reset.
Any ideas? Thanks,
David
Received on Mon Jan 12 01:26:35 1998
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