RE: Cat Box

> > Joe,
> > Look at the lattice 1k and 2k series. The IO's are real IO's.
> There are
> > also a few dedicated inputs available.
> >
>
> By IO, does that mean that the pin can be an input and an
> output SIMULTANEOUSLY? Most PLDs I see have "IO blocks," but for
> a given design, they can only be configured to be inputs or outputs,
> not both.
>
*grumble* stupid Microsoft Exchange crashed when I tried to send this...
Have to re-type it...

I was trying to use a "bidirectional" I/O on the MultiPac with a
Mach111. There's an example of how to set it up in Synario on the
Synario/Minc website. It never occurred to me that the Mach
architecture wouldn't be able to do that ("hey, it says 'I/O'") so I
just told it to build the thing.

Curiously enough, the Mach fitter built the design without a complaint.
Odd, since it'll normally raise hell with warning messages if it finds
*anything* fishy. But, alas, it didn't work. I ended up running out of
I/O's anyway so I abandoned the idea.

I suspect something more FPGA-like is required for that type of
functionsl. Maybe an Altera or Xilinx part. (I haven't looked at the
Xilinx 9500 series CPLD-like stuff though.)

-Clay
Received on Tue Jul 21 17:09:28 1998