Cat box signals

OK, more perusing the schems today (slow day at work :)

Pin #'s are from the 40 pin interconnect board J101.

INPUTS:

Matrix pin assignments as follow:
COL1 (Pin 36)
COL2 (Pin 35)
COL3 (Pin 34)
COL4 (Pin 33)
COL5 (Pin 31)
COL6 (Pin 5)
ROW1 (Pin 40)
ROW2 (Pin 39)
ROW3 (Pin 38)
ROW4 (Pin 37)

0 Matrix (c1:r1)
1 Matrix (c2:r1)
2 Matrix (c3:r1)
3 Matrix (c4:r1)
4 Matrix (c1:r2)
5 Matrix (c2:r2)
6 Matrix (c3:r2)
7 Matrix (c4:r2)
8 Matrix (c1:r3)
9 Matrix (c2:r3)
A Matrix (c3:r3)
B Matrix (c4:r3)
C Matrix (c1:r4)
D Matrix (c2:r4)
E Matrix (c3:r4)
F Matrix (c4:r4)
Error data display (Game / Tester) Matrix (c5:r1)
Address Incr Matrix (c5:r2)
Data Set Matrix (c5:r3)
Tester mode Read / Write, Sig Matrix (c5:r1)

R/W Mode (Static) Matrix (c6:r3) (3 way with below, may be off)
R/W Mode (Off) (NC, default)
R/W Mode (Pulse) Matrix (c6:r4)

Reset (NO momentary, pin 29, Active low)
Self test (NO, pin 30, Active low)
R/W (NO, pin 3, low = WRITE)

Bytes 1024 (Pin 11) (3 way with two below)
        256 (NC, default)
        1 (Pin 13)

DBus Source Data (Pin 7) (3 way with two below)
                Addr (NC, default)
                AL Addr (Pin 9)

(sig inputs)
Start Trailing edge (no thru) (Ties to GND, trailing edge = GND)
        Rising edge (no true) (pull-up to +5)
This is XOR'd with the start probe signal and results in (pin 6)

Stop Trailing edge (no thru) (Ties to GND, trailing edge = GND)
        Rising edge (no true) (pull-up to +5)
This is XOR'd with the stop probe signal and results in (pin 4)

Clock Trailing edge (no thru) (Ties to GND, trailing edge = GND)
        Rising edge (no true) (pull-up to +5)
This is XOR'd with the clock probe signal and results in (pin 8)

For a total of 31 bits worth of switch data. We could go with a DWORD (32
bit mask bit structure and even have a parity bit if we wanted it :)

MISC:

Data probe (not a switch but an input to be dealt with) (Pin 2)

OUTPUT:
This gets harder
We have 6 x 8 segment leds (48 bits)
Unstable sig (part of a 7th phantom 8 segment)
Compare error (part of a 7th phantom 8 segment)
looping (part of a 7th phantom 8 segment)

Gate
No clock

A total of 53 output bits. We can still go for something like a 64 bit
path.

Oh wait a sec. This is serial, it doesn't really matter does it. Though
internally I can store it as a 64bit int I only need to receive the 53 bits.
Question is how would Joe deal with it on his end building it all up for me.

For some reason this just doesn't all feel right, but I don't have any other
ideas right now.

Well I guess I do, we could go something like 3:8 (3 data selector bits 8
bits of data), so we would have:

Select Means
00 (Led 1)
01 (led 2)
02 (led 3)
03 (led 4)
04 (led 5)
05 (led 6)
06 (Phantom led)
07 (Gate)
08 (no clock)

Then we can mask in the led values into a single byte.

I have never had to deal with large #'s of simultaneous changing outputs
like this before so both of these might be way off base.

David
Received on Fri Jul 24 19:24:18 1998