Signature Analysis/CAT Box question

I have been trying to repair a Space Duel board recently that has me a
little stumpped at the moment. Using a Fluke 9100, all RAM/ROM test OK, but
it still won't go into the test screen. This leads me to the conclusion
that is is a vector generator problem. While looking for other ways to
troubleshoot this, I began looking through the CAT Box test procedures in
the schematics and came to the Signature Analysis section which tests a
number of the control lines like VGGO. I've done sig analysis on Battlezone
boards where it is all built into the board, but Space Duel wants the CAT
Box to do the analysis. It just says to put the CAT Box in signature
analysis mode. Trying to figure out what that did, I looked in the CAT Box
manual from Spies and it just says that it increments the address lines.
Does anyone know more specifically what the CAT Box does in signature
analysis mode? If it is just repeatedly incrementing the address lines,
does anyone know what the beginning and ending addresses are? Hopefully, I
can simuluate whatever the CAT Box is doing on the Fluke.

Thanks,
-Chris
Received on Sat Oct 9 23:19:44 1999