testing RAM chips

Hello Guys,

What is the right way to check for defective RAM chips?

Normally you would check for activity on the data bus, but ofcourse there will
be a lot of other activity from all other stuff on the bus, so this does not
seem very usefull to check the particular RAM. I was thinking one has to check
for activity on the bus WHILE the chipselect of THAT paricular RAM chip is
active AND the R/W line is set to READ? (thinking that at that moment the
activity on the bus is 'made' by the RAM chip, when working properly?)

Is this right or is there a better (easier way) of checking?

This question is because my Tempest (which I blew swapping the J9 and J6 on the
ARII) reports the RAM at M3 to be faulty, and the adress decoders/bus drivers
seem to be fine on the o'scope.

Mendel
---------------------------------------------------------------------------
** To UNSUBSCRIBE from vectorlist, send a message with "UNSUBSCRIBE" in the
** message body to vectorlist-request@synthcom.com. Please direct other
** questions, comments, or problems to neil@synthcom.com.
Received on Mon Apr 24 09:44:19 2000