Re: Cinematronics CPU on a chip

I have thought about doing it off and on for a while but there is one thing
you should consider. If you want to preserve the design in a format which
is portable to future platforms you may want to consider coding it in
verilog. I know that it will be a much bigger pain in the ass initially but
at least it's easier to retarget the device down the road when the fpga or
cpld's you use become obsolete. It also makes it easier to share source
with others without them having to buy Viewlogic. Of course if Viewlogic
stays around (which they prob will) then retargeting won't be so hard.
We've gone through 3 different capture tools in the last few years so it's
scary thinking that anything can happen to an EDA house (why oh why did
synario/ecs disappear ).

BTW, have you done any gate count estimates?

Omar

-----Original Message-----
From: Ozdemir, Steven S, GOVMK <sozdemir@att.com>
To: vectorlist@synthcom.com <vectorlist@synthcom.com>
Date: Wednesday, May 03, 2000 3:26 PM
Subject: VECTOR: Cinematronics CPU on a chip

>G'day folks,
>
>I'm interested in converting a Cinematronics schematic that I captured
using
>Viewlogic's ViewDraw to Orcad (MaxPlus). Has anyone on the list done this
>or something similar in a FPGA project?
>
>One suggestion has been using the EDIF netlist between the two packages.
>But this only works if the pins match, and I'd be using different libraries
>for the same parts.
>
> Steve Ozdemir
> sozdemir@att.com
>
>ps - This is the last hurdle to restarting up the "Cinematronics CPU on a
>chip" project that I've spoken of over the years. If you've expressed
>interest in this project and would like to be included in the project's
>mailing list, please email me privately at sozdemir@att.com
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Received on Wed May 3 16:06:07 2000