I've got a couple of BZ AVGs that I'm fighting with at the moment.
All RAMs/ROMs are know good, checked in circuit.
Analog output section is not a problem.
It is the state machine/vector generator that is giving me fits.
In the schematics there are some signatures for the state dividers
(74LS161s) but where is the clock/start/stop points?
Is there any good method for analyzing the state machine & input/outputs?
My understanding of the VG state machine is that the CPU loads a vectorlist
into RAM & the state machine pulls these points & draws them independantly
of the CPU. Or am I misguided?
Thanks,
Kev
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Received on Tue Sep 11 05:53:29 2001
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