>(1) Check pin 6 (NMI*) of the 6502; make it isn't floating or stuck
>low. According to the schematic, NMI* should be held permanently high
>(along with pin 2 (READY) and pin 38 (SO)) through the 1K resistor at R19.
Its high, close to the rail.
>(2) Pin 4 (IRQ*) is fed from pin 11 of the 74LS00 @ L3, which also
>connects back to pin 10 of the 74LS161 counter @ J4. This counter is
>driven by a 3KHz clock at pin 2; make sure this clock is present, and that
>the LS161's CLEAR* signal at pin 1 isn't stuck low.
This is one of the first things I checked, because I noticed that the INTACK
was never being generated. So, INT starts out high, and goes low, but since
the processor is stopped, it never clears so it stays low. I'll have to
look closer to see if the INT happens before, at the same time the, or after
the processor stops. I suspect it won't matter, since for another test I
lifted the INT pin and held it high - processor did the same thing.
On a separate note, just out of curiosity to make sure that the address
decoder circuitry was working (at least for the INTACK line and a few
others), I did a static state test and by setting the address lines high and
low as needed with jumpers with the CPU removed, and they checked out. I
know this isn't indicative of if the chips function at operating speed, but
at least I know they aren't completely dead.
I also checked continuity to all the ROM data lines and address lines. I'll
try replacing the 2114 RAMs today and see if it can jump start - I just
checked that the RAM0 line is getting a few pulses before dying, as well as
WE.
>>The watchdog barks, so I disabled it
>(3) *How*, exactly, did you disable it? Make sure pin 40 (RESET*) at
>the CPU isn't stuck low or floating...
By grounding the WDDIS lug that sits between R3 & R4. Just a gate input
into the watchdog circuit put there by Atari.
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Received on Tue Jan 27 06:47:45 2009
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