Re: Another CCPU HDL model appears.

Hi Jason, apologies for the somewhat late post, been busy getting bugs
out the RTL CCPU.

Jason Sullivan wrote:
> Hi folks! After talking to Zonn and looking through the archives,
> this will probably sound like a familiar message.
>
> I've been working the past little while or so on a Verilog HDL model
> of the Cinematronics CPU. Started with the Armor Attack schematics
> and Zonn's simulator and I've gotten to the point where instructions
> are being decoded correctly and I'm close to getting the sequencer
> working (which I know sounds strange, but trust me it makes sense.
>
Makes a lot of sense to me, instruction fetch, decode and execute. In
hind sight I should have done
it this way, I would have at least gained some understanding of how the
CCPU works as a state
machine, however, I was impatient and tried to do it all at once.
> Still wrestling with a reset problem), so I figured I'd ask Zonn a few
> direct questions and ended up checking out the list to find that y'all
> are a couple of weeks ahead of me (which I guess is good, since I'm
> usually years behind on things like this) :-).
>
I'm using the powerup signal to generate the reset. Powerup clears flip
flop C8-B and generates
a reset.The leading edge of watchdog pulse, "proceed" signal, clocks a
'1' into flip flop C8-A,
if flip flop C8-A isn't cleared by a cold start signal then the trailing
edge of the watchdog pulse sets
flip flop C8-B and generates reset. Another way of putting it, the
first flip flop "enables " the second
one unless cleared by cold start.
 
> A few toolset stats: I'm doing this all on Linux, so so far I'm using
> Verilog, the Icarus Verilog synthesizer/simulator, and GTK wave. I
> haven't gotten to the point where I'm looking for vectors yet, but I
> think I'm pretty close, and I'm still hand coding test cases. I
> haven't done a gate estimate, but I'm betting it's not going to take
> up much space at all.
>
Wow, I take my hat off too you. I looked into using Linux a while back,
but too steep a learning curve
and not much in the way of schematic capture and pcb layout tools, stuck
to Windows.
> So, my question to you folks is this: Is there room for two of these?
> Does that even make sense? Would you like my help on your current one,
> Chris (I don't really know VHDL, though)? I'm more interested in
> making a drop-in replacement board for the arcade machines, rather
> than a vector to vga thing simply because I started this with the
> intent of keeping the vector machines going.
>
> Alright, back to prodding the sequencer.
>
Sure, there's room for several versions, Ed has been working on a VHDL
model for a while and is very
nearly there. Omar has, I think a VHDL model, Chris Schalick has a
Verilog model at TTL gate level.
Unfortunately both Omar's and Chris's models crashed and burned so to
speak. I've been crashing and
burning for the last week, thinking I was getting near to something that
worked, but it wasn't so.
Zonn may be working on a model, I don't know, but without Zonn's
excellent documentation of the CCPU
instruction set I wouldn't have got to where I am now. Thanks Zonn :)

I've got to the stage where I'm running rip-off on a TEK465 scope driven
by a Spartan 3E starter kit !!!!!

It's been running in attract mode for a few hours and occasionally I
might flip the coin switch and blast a few ships :)
I'm only plotting vector start points as I haven't got around to
brewing up the analogue section yet. The display
doesn't look that great but what do you expect from an electrostatic
focussed tube !!

I've been comparing the TTL gate level model with my RTL model and found
a few anomalies in the ALU.
ADD and SUB work OK as expected, but the "load B" or L_bus opcode
modifies the carry out. Carry is
generated by the function (A or not B) plus (A and B) or (K or not L)
plus (K and L), (see S181 data sheet).
In most cases it probably doesn't matter and only effects the JNC
instruction, however, I had to include it just in case.

Still have a lot of work to do, have to update the vhdl simulation model
and fix the rtl model so it simulates properly.

Anyway, it's good to see a game running albeit a poor rendition an an
analogue scope :)
 

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Received on Fri Apr 17 20:25:40 2009