Re: Tempest schematic error?

David,

I stumbled across the same thing when I rewrote the vector generator for
mame. According to the schematics !LATCH1 is used for both clearing and
latching DVG0-3 into F5 which doesn't make sense. IMO F5:1 should be pulled
high the same way they did it with J7:1.

Cheers,
Mathis

David Shoemaker wrote:
> I was working on one of the boards today and noticed something odd.
> According to DP-190-03 2nd printing
> Sheet 3 side A
>
> !Latch 1 runs to all the LS194's used as part of the Vector-Generator
> Data Shifter. This should go to pin 1 on each (D5, D6, E5, H5, H6 & F5)
>
> But as I was probing all the chips to ensure they were getting signal (I
> am not getting any vectors out on this board). I found that Pin 1 on F5
> is not getting toggled like the rest are. Figured that it was a broken
> trace somewhere. But in looking over the board I can't see any problems
> in that area. I check continuity between F5:1 and any of the others and
> get nothing. But it is there between all the others.
>
> I then checked this on a known good board. Same thing. F5:1 does not
> connect to the others.
>
> Anyone else noticed this? Or have any idea what F5:1 should connect to?
>
> Thanks,
> David

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Received on Tue Dec 1 03:55:03 2009