Tempest Schematic error?

So I was looking through the schematics today, and it seems that there is a
problem in the vector-generator data shifter section. Specifically with F5.
Perhaps I'm just confused, so I thought I would ask and see. But it looks to
me like pins 1&2 are tied together. Instead of having /Latch1 going into pin
1.

Also could someone explain to me what the P,R15, and P,R31 lines are?

Thanks,

Kevin

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Received on Sat Jun 26 19:33:39 2010