Re: Anyone have a dump of the Atari Quantum 82s153 / CF2038N address decoder logic at location 1B ?

Hey All,

For academic interest this is how the JEDEC file breaks down into the
fuse logic of the 82S153/PLS153.

The raw jedec translates to the fuse map 36 fuses for input term pairs (
18 possible inputs, non-inverted and inverted ), followed by 10 fuses of
output sum.
This is repeated 32 times for each term.

Next is 18 pairs of control terms x 10 possible outputs.
Finally 10 bits of output polarity fuses.

The raw breakdown is as follows, I think I have all the terms correct
and the logic doesn't look to be very complex, should fit on a GAL16
without any worries.

Shout if I missed anything.

- James

NAME A A A A A A FC FC FC NI VIVVV
         AS 23 22 21 20 19 18 2 1 0 VO MSBDP
PIN# 111111111
         1 2 3 4 5 6 7 8 9 11 9876543219

  0 10 01 10 10 01 10 10 11 11 11 11 11 11 11 11 11 11 11
0101111100 (NV) !NVRAM = !AS & A23 & !A22 & !A21 & A20 & !A19 & !A18
  1 10 01 10 10 01 10 01 11 11 11 11 11 11 11 11 11 11 11
1001111100 (IO) !I/O = !AS & A23 & !A22 & !A21 & A20 & !A19 & A18
  2 10 01 10 10 10 10 10 11 11 11 11 11 11 11 11 11 11 11
1100111100 (VM) !VMEM = !AS & A23 & !A22 & !A21 & !A20 & !A19 & !A18
  3 10 01 10 10 10 10 01 11 11 11 11 11 11 11 11 11 11 11
1101011000 (IS) !I/OS = !AS & A23 & !A22 & !A21 & !A20 & !A19 & A18
  4 10 01 10 01 10 10 10 11 11 11 11 11 11 11 11 11 11 11
1101101100 (VB) !VBUFEN = !AS & A23 & !A22 & A21 & !A20 & !A19 & !A18
  5 10 01 10 10 01 11 11 11 11 11 11 11 11 11 11 11 11 11
1101110100 (VD) !VD = !AS & A23 & !A22 & !A21 & A20
  6 10 11 11 11 11 11 11 01 01 01 11 11 11 11 11 11 11 11
1101111000 (VP) !VPA = !AS & FC2 & FC1 & FC0
  7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
  8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
  9 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
11 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
12 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
13 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
14 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
19 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
21 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
22 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
23 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
24 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
25 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
26 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
27 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
29 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000
31 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000000000

       End of product terms

Start of control terms / output enables ( 36 x 10 ) starting with output
pin 9 -> 19

000000000000000000000000000000000000 = pin 9 ( configured as input so
output disabled )
000000000000000000000000000000000000 = pin 11 ( configured as input so
output disabled )
111111111111111111111111111111111111 = pin 12
111111111111111111111111111111111111 = pin 13
111111111111111111111111111111111111 = pin 14
111111111111111111111111111111111111 = pin 15
111111111111111111111111111111111111 = pin 16
000000000000000000000000000000000000 = pin 17 ( unused )
111111111111111111111111111111111111 = pin 18
111111111111111111111111111111111111 = pin 19

  S9 to S0 polarity bits

1111111100 = outputs are all inverted except 9 & 11 which are configured
as inputs so don't care
* NOTE: so logic is active low

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Received on Tue Nov 20 01:55:32 2012