Re: Another dumb EE question

On Tue, 24 Apr 2001 18:48:13 -0700 (PDT), you wrote:

>Okay, on Asteroids Deluxe, I'm trying to make a write to any memory
>location in the 8000-ffff go to an 8 bit latch and latch the value on the
>data bus. So if I write 5ah to any address in 8000-ffffh, 5ah will be
>latched.
>
>I'm thinking about using a 74374 to do this. If I connected A15 coming
>from the CPU to the CLK pin and the !OE to the !WR signal coming from the
>processor, would that work?

        If I understand what you're trying to do, then no, that won't work -
OE* only controls whether the output lines are tristated, not whether data
is latched or not. If you did this:
           _______
  DO -----|1D 1Q|-----
  D1 -----|2D 2Q|-----
  D2 -----|3D 7 3Q|----- latched
  D3 -----|4D 4 4Q|----- value
  D4 -----|5D 3 5Q|-----
  D5 -----|6D 7 6Q|-----
  D6 -----|7D 4 7Q|-----
  D7 -----|8D 8Q|-----
          | |
 A15 -----|CLK |
 WR* -----|OE* |
          |_______|

        The result would be that the Q outputs will only be valid whenever WR*
is low; when WR* goes high, the Q lines are tristated (high-impedance), and
any logic connected to them will see floating inputs.

        It appears that what you want is for the 74374 to latch when A15 is
high and WR* is low. The previously-described series of NAND gates will do
this nicely, as follows:
           _______
  DO -----|1D 1Q|-----
  D1 -----|2D 2Q|-----
  D2 -----|3D 7 3Q|----- latched
  D3 -----|4D 4 4Q|----- value
  D4 -----|5D 3 5Q|-----
  D5 -----|6D 7 6Q|-----
  D6 -----|7D 4 7Q|-----
  D7 -----|8D 8Q|-----
          | |
   -------|CLK |
  | ___|OE* |
  | _|_ |_______|
  | GND
  |__________________________________________________
          _____ |
       _1| 1/4 \ 4 _____ _____ |
WR* --|__| 7400 |O------| 1/4 \ _9| 1/4 \ 8 |
        2|_____/ 3 ___| 7400 |O---|__| 7400 |O-----
A15_________________| 5|_____/ 6 10|_____/

    
        In this arrangement, when A15 is high, the high-to-low transition at
WR* will generate a low-to-high transition at CLK, which will cause the
74374 (which is really nothing more than eight D-type flip-flops with their
clocks tied together and tristate buffers on the outputs) to copy the logic
states at the 1D:8D inputs to the 1Q:8Q outputs. Keeping OE* tied to
ground, as shown, keeps the Q outputs enabled, which is probably what you
want if the value you're writing to the latch is going to be used to
control any other logic or to do bank-switching on an EPROM.

>If not, what would be the least number of parts to do this in? As you can
>see by my questions, I know enough about hardware to be dangerous, but
>rather than coming up with a multichip solution, I'd like to learn from
>the experts. ;-)

        Hey, we all gotta start someplace. :)

-----------------------------------------------------------------------------
"There is no virtue in suffering fools gladly, for it only encourages them to
persist in their foolishness." --Kehlog Albran
-----------------------------------------------------------------------------
solarfox@DON'TMESSWITHtexas.net (Gary Akins jr.)
http://lonestar.texas.net/~solarfox
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Received on Tue Apr 24 23:27:02 2001